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%0 Thesis
%A Chen, Hsin-Yu
%T Redox-based random access memory arrays for computing-in-memory and neuromorphic computing
%V 109
%I RWTH Aachen University
%V Dissertation
%C Jülich
%M RWTH-2025-01945
%@ 978-3-95806-814-8
%B Schriften des Forschungszentrums Jülich. Reihe Information/information
%P x, 154 Seiten : Illustrationen
%D 2025
%Z Abweichender Titel auf dem Buchrücken
%Z Dissertation, RWTH Aachen University, 2025
%X The advancement in modern computing technology and applications strongly relies on the transistor downscaling that has been following Moore’s law for almost 60 years. However, the device miniaturization is substantially approaching its physical limit. The further development of computation performance requires “more than Moore” innovations such as memory-centric computing architectures, which have been proposed to break the von Neumann bottleneck. Recently, computing-in-memory (CIM), combining the processor function into the memory and executing computation directly in the memory, and neuromorphic computing (NC), using artificial electronic synapses and neurons to form brain-inspired architectures, have attracted extensive research interests from academia and industry. Apart from conventional charge-based memory, redox-based random access memory (RRAM) has been acknowledged as a low-cost, high-speed, and non-volatile resistance-based memory for CIM and NC. Additionally, it has excellent compatibility to advanced complementary metal-oxide-semiconductor (CMOS) technology, and also exhibits ultra-low energy consumption, offering a great advantage to edge artificial intelligence (AI) applications. This thesis work focuses on the back-end-of-line (BEOL) integration and electrical characterization of active RRAM arrays based on valance change memory. Adopting N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs) as selecting components, microscale and nanoscale technology platforms of active RRAM arrays were developed at the Helmholtz Nano Facility in Research Center Jülich. On the one hand, in the microscale technology platform, plug-type TaOx RRAMs were integrated on the NiSi drain contacts of planar high-k metal-gate MOSFETs, where the NiSi layer was not suggested to serve as the bottom electrode of RRAM directly. In the process of producing contact holes with areas of 2×2 μm2 to expose the NiSi drain contacts, a light interference issue was identified in the contact lithography, and the microloading effect was found considerable in the reactive-ion-etching (RIE) using CHF3. Accordingly, a direct writing approach was introduced by employing a maskless aligner, and the etching time was prolonged with additional wet etching in 1 
%F PUB:(DE-HGF)11 ; PUB:(DE-HGF)3
%9 Dissertation / PhD ThesisBook
%U https://publications.rwth-aachen.de/record/1005699