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@PHDTHESIS{Reimann:1011859,
author = {Reimann, Lennart Michael},
othercontributors = {Leupers, Rainer and Kunz, Wolfgang},
title = {{P}rotecting confidentiality in hardware design : {EDA}
tools for security awareness},
school = {Rheinisch-Westfälische Technische Hochschule Aachen},
type = {Dissertation},
address = {Aachen},
publisher = {RWTH Aachen University},
reportid = {RWTH-2025-04758},
pages = {1 Online-Ressource : Illustrationen},
year = {2025},
note = {Veröffentlicht auf dem Publikationsserver der RWTH Aachen
University; Dissertation, Rheinisch-Westfälische Technische
Hochschule Aachen, 2025},
abstract = {The exponential growth in complexity of Integrated Circuits
(ICs) over recent decades has created critical challenges
for ensuring hardware security. The rapid rise in hardware
complexity has rendered manual design nearly impossible,
driving the widespread adoption of automated tools as
essential components in modern design processes. Electronic
Design Automation (EDA) tools offer crucial support to
designers throughout the development process. However,
current EDA tools focus primarily on optimizing traditional
metrics like power, performance, and area, with insufficient
consideration of security properties. This gap has led to
the emergence of serious hardware vulnerabilities. Such
vulnerabilities at the hardware level can undermine the
security of entire computing systems, exposing sensitive
data and causing significant financial and reputational
damage. Enhancing EDA tools and hardware design approaches
with built-in security considerations represents an evolving
priority for the semiconductor sector. While security-aware
EDA tools have begun to appear on the market, their
integration into standard industry practices is progressing
slowly. The hardware industry has been reluctant to adopt
security-aware EDA tools as they often compromise
traditional design goals and complicate the development
process. To address this reluctance, this thesis introduces
novel methodologies and automated tools for detecting
confidentiality vulnerabilities during the design phase.
These contributions aim to overcome industry concerns that
have impeded the integration of security measures in
hardware design. The exponential increase in digital data
makes confidentiality crucial for privacy and security,
driving our research to enhance confidentiality measures.
This thesis presents three main contributions: First, a
comprehensive evaluation of security assessment techniques
is conducted, comparing manual inspection, repurposed
manufacturing testing tools, and dedicated security
frameworks. Examining the limitations of these approaches
reveals key opportunities for advancing automated security
analysis frameworks further. Second, addressing these
opportunities, a novel quantitative framework for assessing
information leakage in hardware designs is developed. This
framework assigns metrics to leakages, allowing designers to
prioritize vulnerabilities based on severity. Third, for
hardware vulnerabilities that cannot be eliminated, an
automated formal verification framework is presented to
ensure that software does not exploit them. The developed
frameworks allow for early detection of vulnerabilities,
quantitative assessment of their severity, and verification
of software-level mitigations, addressing industry adoption
concerns.},
cin = {611910},
ddc = {621.3},
cid = {$I:(DE-82)611910_20140620$},
typ = {PUB:(DE-HGF)11},
doi = {10.18154/RWTH-2025-04758},
url = {https://publications.rwth-aachen.de/record/1011859},
}
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