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001012236 001__ 1012236 001012236 005__ 20250717082535.0 001012236 0247_ $$2HBZ$$aHT031172637 001012236 0247_ $$2Laufende Nummer$$a44413 001012236 0247_ $$2datacite_doi$$a10.18154/RWTH-2025-04936 001012236 037__ $$aRWTH-2025-04936 001012236 041__ $$aEnglish 001012236 082__ $$a621.3 001012236 1001_ $$0P:(DE-82)IDM03673$$aWang, Lantao$$b0$$urwth 001012236 245__ $$aFrequency generation for ADPLLs in automotive FMCW radar using nano-scale CMOS$$cvorgelegt von Lantao Wang, M. Sc.$$honline 001012236 260__ $$aAachen$$bRWTH Aachen University$$c2025 001012236 300__ $$a1 Online-Ressource : Illustrationen 001012236 3367_ $$02$$2EndNote$$aThesis 001012236 3367_ $$0PUB:(DE-HGF)11$$2PUB:(DE-HGF)$$aDissertation / PhD Thesis$$bphd$$mphd 001012236 3367_ $$2BibTeX$$aPHDTHESIS 001012236 3367_ $$2DRIVER$$adoctoralThesis 001012236 3367_ $$2DataCite$$aOutput Types/Dissertation 001012236 3367_ $$2ORCID$$aDISSERTATION 001012236 502__ $$aDissertation, Rheinisch-Westfälische Technische Hochschule Aachen, 2025$$bDissertation$$cRheinisch-Westfälische Technische Hochschule Aachen$$d2025$$gFak06$$o2025-04-25 001012236 500__ $$aVeröffentlicht auf dem Publikationsserver der RWTH Aachen University 001012236 5203_ $$lger 001012236 520__ $$aFrequency-modulated continuous-wave (FMCW) radars are extensively utilized in modern automobiles due to their capability to measure distance and velocity, thereby contributing to the reduction of traffic accidents. In these applications, generating the frequency-modulated (FM) signal commonly involves the use of a phase-locked loop (PLL). Traditional charge-pump analog PLLs, however, suffer from several drawbacks, including a large silicon footprint caused by the bulky passive loop filter and the significant contribution of the charge-pump to in-band phase noise.With advancements in technology, designing analog PLLs has become increasingly challenging due to reduced voltage headroom, lower quality factors of passive components, and increased flicker noise from active devices. To address these issues, the concept of the all-digital PLL (ADPLL) has been introduced. ADPLLs utilize a digital loop filter that can be synthesized with standard cells, eliminating the need for a large analog loop filter, thus reducing silicon area and costs. Additionally, ADPLLs offer the flexibility to adjust PLL parameters, such as loop bandwidth, post-fabrication, making them adaptable to various scenarios. They also leverage the continuous scaling-down of CMOS technology more effectively.Despite these advantages, ADPLLs place high demands on the performance of frequency generation circuits. The digitally controlled oscillator (DCO) plays a critical role, as it predominantly affects the out-of-band phase noise of the ADPLL and must have a wide tuning range to determine the chirp signal bandwidth and influence the distance measurement resolution of the FMCW radar. Furthermore, a fine frequency tuning resolution of the DCO is essential because a coarse resolution introduces quantization noise, which degrades the phase noise performance of the PLL. Moreover, the in-band behavior of the ADPLL is largely determined by the reference frequency, typically provided by a crystal oscillator. Reducing the start-up time of the crystal oscillator is also crucial, as it limits the system's response time.The aim of this dissertation is hence to explore architectures for frequency generation circuits, with a primary focus on the design and implementation of the DCO and the crystal oscillator, along with their auxiliary circuitry, such as low-noise power supplies, frequency dividers and buffers, to enhance the performance of ADPLLs for FMCW radar applications. The designs have been validated through measurement results from three 28-nm CMOS silicon prototypes.$$leng 001012236 588__ $$aDataset connected to Lobid/HBZ 001012236 591__ $$aGermany 001012236 653_7 $$a28-nm 001012236 653_7 $$aADPLL 001012236 653_7 $$aCMOS 001012236 653_7 $$aDCO 001012236 653_7 $$aLC oscillator 001012236 653_7 $$aLDO 001012236 653_7 $$aXO 001012236 7001_ $$0P:(DE-82)IDM01258$$aHeinen, Stefan$$b1$$eThesis advisor$$urwth 001012236 7001_ $$0P:(DE-82)1015019$$aOehm, Jürgen$$b2$$eThesis advisor 001012236 8564_ $$uhttps://publications.rwth-aachen.de/record/1012236/files/1012236.pdf$$yOpenAccess 001012236 8564_ $$uhttps://publications.rwth-aachen.de/record/1012236/files/1012236_source.zip$$yRestricted 001012236 909CO $$ooai:publications.rwth-aachen.de:1012236$$pdnbdelivery$$pdriver$$pVDB$$popen_access$$popenaire 001012236 915__ $$0StatID:(DE-HGF)0510$$2StatID$$aOpenAccess 001012236 9141_ $$y2025 001012236 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)IDM03673$$aRWTH Aachen$$b0$$kRWTH 001012236 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)IDM01258$$aRWTH Aachen$$b1$$kRWTH 001012236 9201_ $$0I:(DE-82)616110_20140620$$k616110$$lLehrstuhl für Integrierte Analogschaltungen$$x0 001012236 961__ $$c2025-07-16T13:36:56.358578$$x2025-05-26T09:56:43.237906$$z2025-07-16T13:36:56.358578 001012236 9801_ $$aFullTexts 001012236 980__ $$aI:(DE-82)616110_20140620 001012236 980__ $$aUNRESTRICTED 001012236 980__ $$aVDB 001012236 980__ $$aphd