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001     1012236
005     20250717082535.0
024 7 _ |2 HBZ
|a HT031172637
024 7 _ |2 Laufende Nummer
|a 44413
024 7 _ |2 datacite_doi
|a 10.18154/RWTH-2025-04936
037 _ _ |a RWTH-2025-04936
041 _ _ |a English
082 _ _ |a 621.3
100 1 _ |0 P:(DE-82)IDM03673
|a Wang, Lantao
|b 0
|u rwth
245 _ _ |a Frequency generation for ADPLLs in automotive FMCW radar using nano-scale CMOS
|c vorgelegt von Lantao Wang, M. Sc.
|h online
260 _ _ |a Aachen
|b RWTH Aachen University
|c 2025
300 _ _ |a 1 Online-Ressource : Illustrationen
336 7 _ |0 2
|2 EndNote
|a Thesis
336 7 _ |0 PUB:(DE-HGF)11
|2 PUB:(DE-HGF)
|a Dissertation / PhD Thesis
|b phd
|m phd
336 7 _ |2 BibTeX
|a PHDTHESIS
336 7 _ |2 DRIVER
|a doctoralThesis
336 7 _ |2 DataCite
|a Output Types/Dissertation
336 7 _ |2 ORCID
|a DISSERTATION
500 _ _ |a Veröffentlicht auf dem Publikationsserver der RWTH Aachen University
502 _ _ |a Dissertation, Rheinisch-Westfälische Technische Hochschule Aachen, 2025
|b Dissertation
|c Rheinisch-Westfälische Technische Hochschule Aachen
|d 2025
|g Fak06
|o 2025-04-25
520 3 _ |l ger
520 _ _ |a Frequency-modulated continuous-wave (FMCW) radars are extensively utilized in modern automobiles due to their capability to measure distance and velocity, thereby contributing to the reduction of traffic accidents. In these applications, generating the frequency-modulated (FM) signal commonly involves the use of a phase-locked loop (PLL). Traditional charge-pump analog PLLs, however, suffer from several drawbacks, including a large silicon footprint caused by the bulky passive loop filter and the significant contribution of the charge-pump to in-band phase noise.With advancements in technology, designing analog PLLs has become increasingly challenging due to reduced voltage headroom, lower quality factors of passive components, and increased flicker noise from active devices. To address these issues, the concept of the all-digital PLL (ADPLL) has been introduced. ADPLLs utilize a digital loop filter that can be synthesized with standard cells, eliminating the need for a large analog loop filter, thus reducing silicon area and costs. Additionally, ADPLLs offer the flexibility to adjust PLL parameters, such as loop bandwidth, post-fabrication, making them adaptable to various scenarios. They also leverage the continuous scaling-down of CMOS technology more effectively.Despite these advantages, ADPLLs place high demands on the performance of frequency generation circuits. The digitally controlled oscillator (DCO) plays a critical role, as it predominantly affects the out-of-band phase noise of the ADPLL and must have a wide tuning range to determine the chirp signal bandwidth and influence the distance measurement resolution of the FMCW radar. Furthermore, a fine frequency tuning resolution of the DCO is essential because a coarse resolution introduces quantization noise, which degrades the phase noise performance of the PLL. Moreover, the in-band behavior of the ADPLL is largely determined by the reference frequency, typically provided by a crystal oscillator. Reducing the start-up time of the crystal oscillator is also crucial, as it limits the system's response time.The aim of this dissertation is hence to explore architectures for frequency generation circuits, with a primary focus on the design and implementation of the DCO and the crystal oscillator, along with their auxiliary circuitry, such as low-noise power supplies, frequency dividers and buffers, to enhance the performance of ADPLLs for FMCW radar applications. The designs have been validated through measurement results from three 28-nm CMOS silicon prototypes.
|l eng
588 _ _ |a Dataset connected to Lobid/HBZ
591 _ _ |a Germany
653 _ 7 |a 28-nm
653 _ 7 |a ADPLL
653 _ 7 |a CMOS
653 _ 7 |a DCO
653 _ 7 |a LC oscillator
653 _ 7 |a LDO
653 _ 7 |a XO
700 1 _ |0 P:(DE-82)IDM01258
|a Heinen, Stefan
|b 1
|e Thesis advisor
|u rwth
700 1 _ |0 P:(DE-82)1015019
|a Oehm, Jür­gen
|b 2
|e Thesis advisor
856 4 _ |u https://publications.rwth-aachen.de/record/1012236/files/1012236.pdf
|y OpenAccess
856 4 _ |u https://publications.rwth-aachen.de/record/1012236/files/1012236_source.zip
|y Restricted
909 C O |o oai:publications.rwth-aachen.de:1012236
|p openaire
|p open_access
|p VDB
|p driver
|p dnbdelivery
910 1 _ |0 I:(DE-588b)36225-6
|6 P:(DE-82)IDM03673
|a RWTH Aachen
|b 0
|k RWTH
910 1 _ |0 I:(DE-588b)36225-6
|6 P:(DE-82)IDM01258
|a RWTH Aachen
|b 1
|k RWTH
914 1 _ |y 2025
915 _ _ |0 StatID:(DE-HGF)0510
|2 StatID
|a OpenAccess
920 1 _ |0 I:(DE-82)616110_20140620
|k 616110
|l Lehrstuhl für Integrierte Analogschaltungen
|x 0
980 1 _ |a FullTexts
980 _ _ |a I:(DE-82)616110_20140620
980 _ _ |a UNRESTRICTED
980 _ _ |a VDB
980 _ _ |a phd


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