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@PHDTHESIS{Piacentini:1012795,
author = {Piacentini, Agata},
othercontributors = {Lemme, Max C. and Neumaier, Daniel},
title = {{F}lexible complementary metal oxide semiconductor logic
circuits based on 2{D} transition metal dichalcogenides},
school = {Rheinisch-Westfälische Technische Hochschule Aachen},
type = {Dissertation},
address = {Aachen},
publisher = {RWTH Aachen University},
reportid = {RWTH-2025-05177},
pages = {1 Online-Ressource : Illustrationen},
year = {2024},
note = {Veröffentlicht auf dem Publikationsserver der RWTH Aachen
University 2025; Dissertation, Rheinisch-Westfälische
Technische Hochschule Aachen, 2024},
abstract = {Two-dimensional materials have emerged as promising
candidates for a wide range of potential future applications
in electronics owing to their exceptional electrical,
optical, and mechanical properties. Besides graphene, many
other 2D materials are being investigated, such as hexagonal
boron nitride (h-BN) and transition metal dichalcogenides
(TMDCs). They are crystalline materials consisting of a
single or a few layers of atoms with strong in-plane atomic
bonding and weaker bonding along the out-of-plane direction.
In particular, TMDCs have attracted attention for thin-film
transistor (TFT) technology. TMDCs like molybdenum disulfide
(MoS₂) and tungsten diselenide (WSe₂) exhibit unique
electronic properties, including a bandgap, a crucial
requirement for TFT operation. Furthermore, their
atomic-scale thickness enables flexibility, making them
ideal for flexible electronics. Research into TMDC-based
TFTs aims to optimize their electrical properties, enhance
device stability, and develop scalable manufacturing
processes, opening up the possibility for the next
generation of lightweight and flexible electronics. TMDCs
offer a pathway to high-performance TFTs, with potential
applications like flexible displays, sensors, and wearable
devices. In this PhD thesis, the potential of TMDC
transistors for CMOS applications in flexible electronics is
explored. Specifically, MoS₂ and WSe₂ were utilized as
n- and p-type channels for metal-oxide-field-effect
transistors (MOSFETs), respectively. Achieving proper CMOS
operation necessitates stable operation of both n- and
p-type FETs. An innovative scalable encapsulation method for
MoS₂-FETs, utilizing h-BN monolayers as barrier layers
between each Al₂O₃ and MoS₂ interface, was
investigated. This heterostructure demonstrated a reduction
in n-doping induced by Al₂O₃ encapsulation, along with
decreased hysteresis for ultra-slow sweeping times,
attributed to an improved dielectric interface. Several
contact metals were tested to optimize p-type conduction in
WSe₂-FETs, with palladium top contacts emerging as
superior, showcasing better FET performance (higher mobility
and currents levels). After the fabrication of TFT on a
flexible foil, the flexibility of these devices was
evaluated under various levels of strain, enduring up to
3000 bending cycles without significant degradation. Once n-
and p-type transistors were obtained, they were externally
connected to realize CMOS inverters, fundamental building
blocks for both digital and analogue electronics. These
inverters exhibited excellent performance, demonstrating
ideal switching behaviour with high gain (up to 100), high
noise margin (0.87 VDD), and low average static power
consumption (40 pW). These results surpass previous
TMDC-based flexible inverters. A scalable process for
integrating two different 2D materials on the same foil was
then also developed and used for realizing more complex
circuits. Inverters, ring oscillators, transmission gates,
and multiplexers (2:1 MUX and 4:1 MUX) were successfully
demonstrated on both rigid and flexible substrates, showing
no major differences in functionality for both substrates.
The remarkable performance achieved by these circuits marks
a significant advancement in highlighting the potential of
TMDCs as promising candidates for flexible electronic
circuits.},
cin = {618710},
ddc = {621.3},
cid = {$I:(DE-82)618710_20170609$},
pnm = {ORIGENAL - Origami electronics for three dimensional
integration of computational devices (863258) / Graphene
Flagship Core Project 3 (881603)},
pid = {G:(EU-Grant)863258 / G:(EU-Grant)881603},
typ = {PUB:(DE-HGF)11},
doi = {10.18154/RWTH-2025-05177},
url = {https://publications.rwth-aachen.de/record/1012795},
}
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