guest ::
001013042 001__ 1013042 001013042 005__ 20250921221513.0 001013042 0247_ $$2ISBN$$a979-8-3315-3484-4 001013042 0247_ $$2SCOPUS$$aSCOPUS:2-s2.0-105008488954 001013042 0247_ $$2doi$$a10.1109/COOLCHIPS65488.2025.11018601 001013042 037__ $$aRWTH-2025-05303 001013042 041__ $$aEnglish 001013042 1001_ $$0P:(DE-82)981232$$aChen, Yi$$b0$$eCorresponding author$$urwth 001013042 1112_ $$a2025 IEEE Symposium on Low-Power and High-Speed Chips and Systems$$cTokyo$$d2025-04-16 - 2025-04-18$$gCOOL CHIPS$$wJapan 001013042 245__ $$aGUPA: Group-Wise Uniform Pruning Accelerator for Depthwise Separable Convolution$$honline 001013042 260__ $$bIEEE$$c2025 001013042 29510 $$a2025 IEEE Symposium on Low-Power and High-Speed Chips and Systems (COOL CHIPS) : 16-18 April 2025 001013042 3367_ $$033$$2EndNote$$aConference Paper 001013042 3367_ $$0PUB:(DE-HGF)7$$2PUB:(DE-HGF)$$aContribution to a book$$mcontb 001013042 3367_ $$0PUB:(DE-HGF)8$$2PUB:(DE-HGF)$$aContribution to a conference proceedings$$bcontrib$$mcontrib$$s1749714677_1311856 001013042 3367_ $$2BibTeX$$aINPROCEEDINGS 001013042 3367_ $$2DRIVER$$aconferenceObject 001013042 3367_ $$2DataCite$$aOutput Types/Conference Paper 001013042 3367_ $$2ORCID$$aCONFERENCE_PAPER 001013042 536__ $$0G:(DE-82)BMBF-16ME0399$$aBMBF 16ME0399 - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0399)$$cBMBF-16ME0399$$x0 001013042 536__ $$0G:(BMBF)03ZU1106CA$$aBMBF 03ZU1106CA - NeuroSys: Algorithm-Hardware Co-Design (Projekt C) - A (03ZU1106CA)$$c03ZU1106CA$$x1 001013042 588__ $$aDataset connected to CrossRef Conference 001013042 7001_ $$0P:(DE-82)IDM06401$$aWabnitz, Malte$$b1$$eCorresponding author$$urwth 001013042 7001_ $$0P:(DE-82)IDM05545$$aLou, Jie$$b2$$eCorresponding author$$urwth 001013042 7001_ $$0P:(DE-82)841076$$aLanius, Christian$$b3$$eCorresponding author$$urwth 001013042 7001_ $$0P:(DE-82)IDM01616$$aGemmeke, Tobias$$b4$$eCorresponding author$$urwth 001013042 8564_ $$uhttps://publications.rwth-aachen.de/record/1013042/files/1013042.pdf$$yRestricted 001013042 9151_ $$0StatID:(DE-HGF)0031$$2StatID$$aPeer reviewed article$$x0 001013042 9141_ $$y2025 001013042 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)981232$$aRWTH Aachen$$b0$$kRWTH 001013042 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)IDM06401$$aRWTH Aachen$$b1$$kRWTH 001013042 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)IDM05545$$aRWTH Aachen$$b2$$kRWTH 001013042 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)841076$$aRWTH Aachen$$b3$$kRWTH 001013042 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)IDM01616$$aRWTH Aachen$$b4$$kRWTH 001013042 9201_ $$0I:(DE-82)611110_20170101$$k611110$$lLehrstuhl für Integrierte digitale Systeme und Schaltungsentwurf$$x0 001013042 961__ $$c2025-06-12T10:02:39.774665$$x2025-06-12T10:02:39.774665$$z2025-06-12 001013042 980__ $$aI:(DE-82)611110_20170101 001013042 980__ $$aUNRESTRICTED 001013042 980__ $$aVDBINPRINT 001013042 980__ $$acontb 001013042 980__ $$acontrib