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001     1014543
005     20250715051736.0
024 7 _ |2 ISBN
|a 978-1-6654-7763-5
024 7 _ |2 ISBN
|a 978-1-6654-7764-2
024 7 _ |2 ISBN
|a 978-1-66547-763-5
024 7 _ |2 ISBN
|a 978-1-66547-764-2
024 7 _ |2 ISSN
|a 2373-0862
024 7 _ |2 SCOPUS
|a SCOPUS:2-s2.0-105004731721
024 7 _ |2 WOS
|a WOS:001480998600023
024 7 _ |2 doi
|a 10.1109/LATS65346.2025.10963957
037 _ _ |a RWTH-2025-06139
041 _ _ |a English
100 1 _ |0 P:(DE-82)IDM04616
|a Santos Copetti, Thiago
|b 0
|e Corresponding author
|u rwth
111 2 _ |a IEEE 26. Latin American Test Symposium
|c San Andres Islas
|d 2025-03-11 - 2025-03-14
|g LATS 2025
|w Colombia
245 _ _ |a A Combined Strategy for Testing RRAMs After Manufacturing and During Lifetime
|h online, print
260 _ _ |a [Piscataway, NJ]
|b IEEE
|c 2025
295 1 0 |a 2025 IEEE 26th Latin American Test Symposium (LATS) : 11-14 March 2025; conference location: San Andrés Islas, Colombia / publisher: IEEE ; [general co-chairs: Ernesto Sanchez – Politecnico di Torino, Italy; Yervant Zorian – Synopsys, USA ; publication co-chairs: Thiago S. Copetti – RWTH Aachen, Germany]
300 _ _ |a 6 Seiten
336 7 _ |0 33
|2 EndNote
|a Conference Paper
336 7 _ |0 PUB:(DE-HGF)7
|2 PUB:(DE-HGF)
|a Contribution to a book
336 7 _ |0 PUB:(DE-HGF)8
|2 PUB:(DE-HGF)
|a Contribution to a conference proceedings
|b contrib
|m contrib
336 7 _ |2 BibTeX
|a INPROCEEDINGS
336 7 _ |2 DRIVER
|a conferenceObject
336 7 _ |2 DataCite
|a Output Types/Conference Paper
336 7 _ |2 ORCID
|a CONFERENCE_PAPER
588 _ _ |a Dataset connected to , , , CrossRef Conference
591 _ _ |a Germany
700 1 _ |0 P:(DE-82)1014558
|a Chakraborty, Supriya
|b 1
|u rwth
700 1 _ |a Bolzani Poehls, Leticia M.
|b 2
|e Corresponding author
909 C O |o oai:publications.rwth-aachen.de:1014543
|p VDB
910 1 _ |0 I:(DE-588b)36225-6
|6 P:(DE-82)IDM04616
|a RWTH Aachen
|b 0
|k RWTH
910 1 _ |0 I:(DE-588b)36225-6
|6 P:(DE-82)1014558
|a RWTH Aachen
|b 1
|k RWTH
914 1 _ |y 2025
915 1 _ |0 StatID:(DE-HGF)0041
|2 StatID
|a Peer review status of article unknown
|x 0
920 1 _ |0 I:(DE-82)611110_20170101
|k 611110
|l Lehrstuhl für Integrierte digitale Systeme und Schaltungsentwurf
|x 0
980 _ _ |a I:(DE-82)611110_20170101
980 _ _ |a UNRESTRICTED
980 _ _ |a VDB
980 _ _ |a contb
980 _ _ |a contrib


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