guest ::
000119482 001__ 119482 000119482 005__ 20221103145154.0 000119482 0247_ $$2DOI$$a10.1007/978-3-540-69303-1_5 000119482 0247_ $$2HSB$$a999910025923 000119482 0247_ $$2ISBN$$a978-3-540-69302-4 000119482 0247_ $$2ISBN$$a978-3-540-69303-1 000119482 0247_ $$2ISSN$$a0302-9743 000119482 0247_ $$2ISSN$$a1611-3349 000119482 0247_ $$2SCOPUS$$aSCOPUS:2-s2.0-48949091446 000119482 0247_ $$2WOS$$aWOS:000257088300005 000119482 037__ $$aRWTH-CONV-190608 000119482 041__ $$aEnglish 000119482 1001_ $$0P:(DE-82)IDM00334$$aTerboven, Christian$$b0$$eAuthor 000119482 1112_ $$aA practical programming model for multi-core era : International workshop on OpenMP$$cBeijing$$d2007-06-03 - 2007-06-07$$gIWOMP 2007$$wPeoples R China 000119482 245__ $$aOpenMP on multicore architectures$$honline, print 000119482 260__ $$aBerlin [u.a.]$$bSpringer$$c2008 000119482 29510 $$aA practical programming model for multi-core era : International workshop on OpenMP, IWOMP 2007, Beijing, China, June 3-7, 2007 ; proceedings / Barbara Chapman ... (eds.) 000119482 300__ $$a54-64 000119482 3367_ $$033$$2EndNote$$aConference Paper 000119482 3367_ $$0PUB:(DE-HGF)7$$2PUB:(DE-HGF)$$aContribution to a book 000119482 3367_ $$0PUB:(DE-HGF)8$$2PUB:(DE-HGF)$$aContribution to a conference proceedings$$bcontrib$$mcontrib 000119482 3367_ $$2BibTeX$$aINPROCEEDINGS 000119482 3367_ $$2DRIVER$$aconferenceObject 000119482 3367_ $$2DataCite$$aOutput Types/Conference Paper 000119482 3367_ $$2ORCID$$aCONFERENCE_PAPER 000119482 4900_ $$aLecture Notes in Computer Science$$v4935 000119482 591__ $$aGermany 000119482 653_7 $$aOpenMP 000119482 653_7 $$aSMP systems 000119482 653_7 $$aapplication program interfaces 000119482 653_7 $$acache architecture 000119482 653_7 $$acache storage 000119482 653_7 $$adualcore processors 000119482 653_7 $$akernel programs 000119482 653_7 $$amemory architecture 000119482 653_7 $$amicroprocessor chips 000119482 653_7 $$amulti-threading 000119482 653_7 $$amulticore architectures 000119482 653_7 $$aoperating system kernels 000119482 653_7 $$aquadcore processors 000119482 653_7 $$ashared memory machines 000119482 7001_ $$0P:(DE-82)IDM02882$$aan Mey, Dieter$$b1$$eAuthor$$urwth 000119482 7001_ $$0P:(DE-82)020352$$aSarholz, Samuel$$b2$$eAuthor 000119482 909CO $$ooai:publications.rwth-aachen.de:119482$$pVDB 000119482 9101_ $$0I:(DE-588b)36225-6$$6P:(DE-82)IDM02882$$aRWTH Aachen$$b1$$kRWTH 000119482 9141_ $$y2008 000119482 9151_ $$0StatID:(DE-HGF)0031$$2StatID$$aPeer reviewed article 000119482 9201_ $$0I:(DE-82)022000_20131231$$k022000$$lRechen- und Kommunikationszentrum$$x0 000119482 9201_ $$0I:(DE-82)123010_20140620$$k123010$$lLehrstuhl für Informatik 12 (Hochleistungsrechnen)$$x1 000119482 9201_ $$0I:(DE-82)120000_20140620$$k120000$$lFachgruppe Informatik$$x2 000119482 961__ $$c2014-10-10$$x2011-02-04$$z2012-02-20 000119482 970__ $$ahsb999910025923 000119482 980__ $$aConvertedRecord 000119482 980__ $$aI:(DE-82)022000_20131231 000119482 980__ $$aI:(DE-82)120000_20140620 000119482 980__ $$aI:(DE-82)123010_20140620 000119482 980__ $$aUNRESTRICTED 000119482 980__ $$aVDB 000119482 980__ $$acontb 000119482 980__ $$acontrib