guest ::
TY - THES AU - Behmenburg, Hannes TI - Comprehensive study on MOVPE of InAlN/GaN HEMT structures and GaN nanowires CY - Aachen PB - Publikationsserver der RWTH Aachen University M1 - RWTH-CONV-143614 SP - V, 155 S. : Ill., graph. Darst. PY - 2013 N1 - Aachen, Techn. Hochsch., Diss., 2013 AB - The use of InAlN as barrier layer material is considered as promising idea to enhance the high frequency performance of GaN-based High Electron Mobility Transistors (HEMT). In comparison to the conventionally employed AlGaN, the introduction InAlN allows the realization of a strain free layer stack with enhanced carrier density in the 2-dimensional electron gas at simultaneously reduced barrier layer thickness. The reduction of the barrier layer thickness allows to realize short gate lengths and to maintain a high aspect ratio of barrier layer thickness and gate length. This is necessary to ensure control over carriers in the transistor channel. Aim of this work is a comprehensive study of the entire growth process of InAlN/GaN HEMT structures on sapphire and SiC by metalorganic vaporphase epitaxy (MOVPE). First, the development of a GaN buffer structure on sapphire and SiC suitable for high frequency operation is in the focus to allow meaningful evaluation of improvement by introduction of InAlN as new barrier layer material. Necessary properties of this buffer are insulating behavior, a large breakdown field, a low dislocation density and a low background impurity level. It can be shown that the polar orientation of the on sapphire employed AlN nucleation mainly depends on the ratio of initially supplied precursors. Control of the initial supply can be influenced by AlN residues in the reactor chamber. Investigations of the AlN growth conditions show that the development of tensile and compressive strain depends on the V/III ratio employed. This is attributed to a variation of the surface diffusion length of the Al adatom and the associated growth mode. Sequential combination of different V/III ratios can be used to control the state of strain and the surface morphology allowing to deposit 500 nm thick and crack-free AlN layers with a smooth surface. GaN buffer structures deposited on the optimized AlN layer show the required insulating properties, a large breakdown field, a low dislocation density and a low impurity background level. Investigations of the InAlN growth process show an almost linear growth temperature dependency of In incorporation. This allows accurate control of composition and growth lattice matched to the GaN buffer. Unintentional Ga incorporation in InAlN is detected and attributed to GaN residues in the growth reactor. Modifications of the reactor chamber almost completely eliminate the unintentional incorporation of Ga in InAlN. Electrical characterization of processed transistor structures yield excellent power densities of 2,9 W/mm and 2,0 W/mm at 18 GHz and 40 Ghz, respectively. Finally, the catalyst-assisted growth of GaN nanowires on sapphire is investigated for the development of future nanostructured devices. A process window is described, which promotes the growth of 1-dimensional structures leading to the formation of straight, dislocation-free and N-polar nanowires with a diameter of 60 nm and a density of 3·109 cm-2. It can be shown that the diameter of the nanowires is influenced by the diameter of the catalyst the size of which is adjustable by the partial pressure of the precursor material. KW - Drei-Fünf-Halbleiter (SWD) KW - Galliumnitrid (SWD) KW - HEMT (SWD) KW - MOCVD-Verfahren (SWD) LB - PUB:(DE-HGF)11 UR - https://publications.rwth-aachen.de/record/210483 ER -