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  <ref-type name="Thesis">32</ref-type>
  <contributors>
    <authors>
      <author>Sun, Bin</author>
      <author>Knoch, Joachim</author>
      <author>Mikolajick, Thomas</author>
    </authors>
    <subsidiary-authors>
      <author>616210</author>
    </subsidiary-authors>
  </contributors>
  <titles>
    <title>Reconfigurable field-effect transistors based on wet-chemically etched silicon nanostructures</title>
  </titles>
  <periodical/>
  <publisher>RWTH Aachen University</publisher>
  <pub-location>Aachen</pub-location>
  <language>English</language>
  <pages>1 Online-Ressource : Illustrationen</pages>
  <number/>
  <volume/>
  <abstract>During the last decades, a performance improvement in power and speed of highly integrated circuits (ICs) has been continuously achieved by increasing the number of transistors of decreasing size onto the same chip area. The aggressive scaling of transistors, however, leads to dopant-related issues such as dopant deactivation in nanostructures as well as device-to-device variability due to random dopant effects. Reconfigurable field-effect transistors are a variant of Schottky-barrier MOSFETs with metallic source and drain contacts that have been attracting a great deal of interest since replacing the doped source/drain regions with metals allows avoiding dopant-related issues. Furthermore, transistor devices based on novel 2D materials or carbon nanotubes are usually fabricated in a straightforward way by depositing metals on top of the material. However, in most cases Fermi level pinning at the metal-semiconductor interface occurs within the bandgap giving rise to substantial Schottky-barriers (SB) at the contact channel interfaces that strongly impact the electrical characteristics of such SB-MOSFETs, leading to a deteriorated ON-state performance and a degraded switching behavior. In addition, one of the most predominant features of SB-MOSFETs is a distinct sub-linear behavior in the triode operation regime of the output characteristics for small bias which is highly undesirable with respect to applying such devices in logic circuits. In this work, reconfigurable field-effect transistors with two gates that can be utilized to tune the effective Schottky barrier height at the source and drain sides individually are fabricated and investigated. First, a top-down technique using a two-step wet-chemical etching of silicon for the fabrication of nanowires with triangular cross-section on a silicon-on-insulator substrate is presented. Such a self-limiting fabrication approach yields localized silicon nanowires with atomically flat surfaces and minimal plasma damage manufacturable with conventional h-line contact lithography. Next, a simulation tool based on the level set method that allows modeling and prediction of the shape transformation of silicon structures during hydrogen annealing with high accuracy is introduced. Additionally, a modified electron beam evaporation setup is demonstrated for the first time to obtain a reliable and reproducible lift-off process. The modified electron beam evaporation chamber with two permanent magnets and a hollow metallic cylinder installed turns out to be very effective in avoiding the irradiation of electrons and ions on PMMA, yielding near perfect deposition results for a large variety of different materials. After the fabrication of the device, the rather overlooked device operation mode with the program gate at source (PGAS) is investigated and compared with the program gate at drain (PGAD). As it turns out, the PGAS mode yields an almost ideal switching behavior similar to a conventional MOSFET while its output characteristics are deteriorated when compared to PGAD which exhibits improved output but deteriorated transfer characteristics. Furthermore, PGAD and PGAS show a distinctly different non-linearity in the output characteristics with a stronger effect in the PGAS mode. Simulation results reveal that the non-linearity in PGAS is due to a forward-biased Schottky barrier at drain whereas it is due to a charge-mediated impact of drain bias on the channel potential in PGAD. We thereby present with simulation to show that linear output characteristics in the triode operation regime can be achieved in PGAD by approaching the so-called quantum capacitance limit.</abstract>
  <notes>
    <note>Veröffentlicht auf dem Publikationsserver der RWTH Aachen University ; </note>
    <note>Dissertation, Rheinisch-Westfälische Technische Hochschule Aachen, 2022 ; </note>
  </notes>
  <label>2, ; PUB:(DE-HGF)11, ; </label>
  <keywords/>
  <accession-num/>
  <work-type>Dissertation / PhD Thesis</work-type>
  <volume>Dissertation</volume>
  <publisher>Rheinisch-Westfälische Technische Hochschule Aachen</publisher>
  <dates>
    <pub-dates>
      <year>2022</year>
    </pub-dates>
    <year>2022</year>
  </dates>
  <accession-num>RWTH-2022-08816</accession-num>
  <year>2022</year>
  <urls>
    <related-urls>
      <url>https://publications.rwth-aachen.de/record/853412</url>
    </related-urls>
  </urls>
</record>

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