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@PHDTHESIS{Xi:976349,
author = {Xi, Fengben},
othercontributors = {Grützmacher, Detlev and Knoch, Joachim},
title = {{F}erroelectric {S}chottky barrier devices on {SOI} for
neuromorphic computing},
school = {RWTH Aachen University},
type = {Dissertation},
address = {Aachen},
publisher = {RWTH Aachen University},
reportid = {RWTH-2024-00164},
pages = {1 Online-Ressource : Illustrationen},
year = {2023},
note = {Veröffentlicht auf dem Publikationsserver der RWTH Aachen
University 2024; Dissertation, RWTH Aachen University, 2023},
abstract = {The brain-inspired neuromorphic computing has emerged as an
alluring technology due to its energy efficient features and
learning abilities to overcome the von Neumann bottleneck in
the post-Moore era. Neuromorphic engineering focuses on the
field of constructing a smart neuromorphic hardware system
inspired by the human brain neural network. In particular,
the ability to process big data and complete cognitive tasks
in an energy efficient manner is of interest. In
neuromorphic systems complex architectures are required as
neurons communicate via a large number of synapses. For the
implementation emerging non-volatile memories, like
resistive random-access memory, phase change memory and
memristor based devices are currently considered. However,
high variability, poor stability and high operation voltage
are challenges for these devices. Recently the memtransistor
using HfO2 based ferroelectrics as gate oxide has attracted
a lot of attention due to its CMOS compatibility, energy
efficiency and miniaturization ability. Thus, in this
thesis, advanced ferroelectric device concepts were
fabricated and carefully analyzed. In a first step
metal-ferroelectrics-metal (MFM) capacitors were fabricated.
The ferroelectric Hf0.5Zr0.5O2 (HZO) and Si:HfO2 (HSO)
layers were deposited by atomic layer deposition (ALD). The
process was optimized to obtain the desired ferroelectric
properties. Contact electrodes were fabricated from TiN and
epitaxial single crystalline NiSi2. Two terminal artificial
synapses typically show parasitic currents and
instabilities, to overcome these we fabricated three
terminal artificial synapses using ferroelectric HZO or HSO
as gate oxide. Moreover, ferroelectric Schottky barrier
field effect transistors (FE-SBFETs) have been employed to
demonstrate homo-synaptic plasticity. FE-SBFETs with a long
channel design and a gate last process have been realized.
Source and drain contacts were formed by NiSi2 with
atomically smooth interfaces. By applying voltage pulses to
the ferroelectric gate, the ferroelectric polarization is
gradually switched and in turn the NiSi2/ Si Schottky
barriers are gradually modulated. Thus, the conductance of
the device is programmed with the input voltage pulses. The
short-term synaptic plasticity is characterized by
measurements of excitatory/ inhibitory post-synaptic
currents (EPSC/ IPSC) and paired-pulse facilitation/
depression (PPF/ PPD). The device can be modulated with
voltage pulses (spikes) of very low energy, as small as 2
fJ, demonstrating high energy efficiency. Long-term
potentiation/ depression (LTP/ LTD) results show very high
endurance and very small cycle-to-cycle variations $(~1\%).$
Furthermore, spike-timing-dependent plasticity (STDP) is
analyzed using the gate voltage pulse as the pre-synaptic
spike and the drain voltage pulse as the post-synaptic
spikes. To explore different ferroelectric dopants and the
potential for down scaling of device dimensions, FE-SBFETs
were fabricated employing HSO as ferroelectric gate oxide
and reducing the channel length to 40 nm. The homo-synaptic
artificial synapse was realized based on the HSO FE-SBFET.
Finally, we built an artificial neuron network (ANN) to
explore the possible neuromorphic functions of the
fabricated homo-synaptic artificial synapses. Digital
pattern recognition of handwriting has been employed as a
demonstrator. The recognition accuracy acquired by the HZO
synapse outperforms that of the HSO synapse. For HZO a
better learning accuracy is achieved from non-identical
pulses due to its high conductance range, large number of
memory states, better linearity, higher symmetry, and lower
variations of LTP and LTD properties. To overcome the
positive feedback loop drawback of homo-synaptic artificial
synapses, we fabricated two different artificial synapses
with hetero-synaptic plasticity. Firstly, hetero-synaptic
devices based on four terminal FE-SBFETs using a back gate
to modulate the neuron are investigated. The excitation and
inhibition behaviors of the artificial synapse can be
modulated by the common back-gate bias, enabling the
reconfiguration of the weight profile. Hetero-synaptic
artificial synapses based on ferroelectric polarization
modulated Schottky diodes (FED) enable specific
hetero-synaptic plasticity with multiple synaptic
functionalities and low power consumption. These devices
have been integrated in logic in-memory units to demonstrate
first building blocks for a hybrid neuromorphic computing
system. The demonstrated basic logic gates include AND, NOR,
NAND, XOR and the half-adder. Remarkably, these logic gates
can be realized with only one or two FED devices. The
realized devices perform multi-functions of the biological
synapse and logic in-memory applications, consequently they
provide high potential for the future smart and energy
efficient neuromorphic computing.},
cin = {134610 / 130000},
ddc = {530},
cid = {$I:(DE-82)134610_20140620$ / $I:(DE-82)130000_20140620$},
pnm = {BMBF 16ME0398K - Verbundprojekt: Neuro-inspirierte
Technologien der künstlichen Intelligenz für die
Elektronik der Zukunft - NEUROTEC II - (BMBF-16ME0398K)},
pid = {G:(DE-82)BMBF-16ME0398K},
typ = {PUB:(DE-HGF)11},
doi = {10.18154/RWTH-2024-00164},
url = {https://publications.rwth-aachen.de/record/976349},
}
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