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A Compact SHA256 Accelerator in 22nm for Energy Bounded Use-Cases with 8.2GHash/J

; ; ;

In
IEEE ISCAS 2025 symposium proceedings : ISCAS 2025 - IEEE International Symposium on Circuits and Systems, London, UK, May 25-28, 2025 / sponsors and organizers: CAS - IEEE Circuits and Systems Society, IEEE ; general co-chairs: Izzet Kale, University of Westminster; Andreas Demosthenous, University College, London; Alison Burdett, TSC-Connected Care, Seiten/Artikel-Nr: 5 Seiten

Konferenz/Event:2025 IEEE International Symposium on Circuits and Systems , London , UK , ISCAS 2025 , 2025-05-25 - 2025-05-28

ImpressumPiscataway, NJ : IEEE

Umfang5 Seiten

ISBN979-8-3503-5683-0, 979-8-3503-5684-7

Online
DOI: 10.1109/ISCAS56072.2025.11043597


Einrichtungen

  1. Lehrstuhl für Integrierte digitale Systeme und Schaltungsentwurf (611110)



Dokumenttyp
Contribution to a book/Contribution to a conference proceedings

Format
online, print

Sprache
English

Anmerkung
Peer review status of article unknown

Externe Identnummern
SCOPUS: SCOPUS:2-s2.0-105010626427
WOS Core Collection: WOS:001537918202084

Interne Identnummern
RWTH-2026-01914
Datensatz-ID: 1028848

Beteiligte Länder
Germany

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The record appears in these collections:
Document types > Events > Contributions to a conference proceedings
Document types > Books > Contributions to a book
Faculty of Electrical Engineering and Information Technology (Fac.6)
Public records
Publications database
611110
 Record created 2026-02-18, last modified 2026-02-19
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