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EURETILE Design Flow: Dynamic and Fault Tolerant Mapping of Multiple Applications Onto Many-Tile Systems

Schor, Lars (Corresponding author) ; Bacivarov, Iuliana (Corresponding author) ; Murillo, Luis Gabriel (Corresponding author) ; Paolucci, Pier Stanislao (Corresponding author) ; Rousseau, Frédéric (Corresponding author) ; El Antably, Ashraf (Corresponding author) ; Bücs, Róbert Lajos (Corresponding author)^RWTH* ; Fournel, Nicolas (Corresponding author) ; Leupers, Rainer (Corresponding author) ; Rai, Devendra (Corresponding author) ; Thiele, Lothar (Corresponding author) ; Tosoratto, Laura (Corresponding author) ; Vicini, Piero (Corresponding author) ; Weinstock, Jan Henrik (Corresponding author)^RWTH*

In
2014 IEEE International Symposium on Parallel and Distributed Processing with Applications (ISPA) : 26-28 Aug. 2014 ; Milan, Seiten/Artikel-Nr: 182-189

2014

Konferenz/Event:2014 IEEE International Symposium on Parallel and Distributed Processing with Applications , Milan , Italy , ISPA 2014 , 2014-08-26 - 2014-08-28

ImpressumPiscataway, NJ : IEEE

Umfang182-189

ISBN978-1-4799-4292-3, 978-1-4799-4293-0

Online
DOI: 10.1109/ISPA.2014.32
10.1109/ISPA.2014.32

Einrichtungen

1. Juniorprofessur für Multi-Processor System-on-Chip (MPSoC) Architectures (618130)
2. Lehrstuhl für Integrierte Systeme der Signalverarbeitung (611810)
3. Lehrstuhl für Software für Systeme auf Silizium (611910)

Inhaltliche Beschreibung (Schlagwörter)
Abstracts (frei) ; Computer architecture (frei) ; EURETILE design flow (frei) ; EURETILE software design flow (frei) ; Hardware (frei) ; Optimization (frei) ; Program processors (frei) ; Programming (frei) ; architectural dynamism (frei) ; architecture-specific implementation (frei) ; autonomous processes (frei) ; behavioral dynamism (frei) ; debugging (frei) ; dynamic mapping (frei) ; embedded computing benchmark (frei) ; fault tolerant mapping (frei) ; fault-tolerant distributed network processor (frei) ; general-purpose processors (frei) ; hardware-based fault awareness strategies (frei) ; high performance computing benchmark (frei) ; high-level programming model (frei) ; intertile communication network (frei) ; lightweight operating system (frei) ; many-tile architectures (frei) ; many-tile systems (frei) ; multiple dynamic application mapping (frei) ; multitile hardware architecture (frei) ; operating systems (computers) (frei) ; organized runtime-manager (frei) ; parallel programming (frei) ; parallel programming paradigm (frei) ; parallel tiled computing system design (frei) ; program debugging (frei) ; programming environment (frei) ; programming environments (frei) ; scalable many-tile simulator (frei) ; software architecture (frei) ; software fault tolerance (frei) ; software-based fault reactivity strategies (frei) ; specialized accelerators (frei) ; system dependability (frei) ; virtual EURETILE platform (frei)

Dokumenttyp
Contribution to a conference proceedings

Format
online, print

Sprache
English

Anmerkung
Peer reviewed article

Externe Identnummern
SCOPUS: SCOPUS:2-s2.0-84911378597
WOS Core Collection: WOS:000364951700023

Interne Identnummern
RWTH-CONV-206821
Datensatz-ID: 460370

Beteiligte Länder
France, Germany, Italy, Switzerland