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Heuristic circuit mapping strategies for the SpinBus architecture
2026
Bachelorarbeit, RWTH Aachen University, 2025
Veröffentlicht auf dem Publikationsserver der RWTH Aachen University 2026
Genehmigende Fakultät
Fak09
Hauptberichter/Gutachter
;
Tag der mündlichen Prüfung/Habilitation
2025-12-01
Online
DOI: 10.18154/RWTH-2026-02163
URL: http://publications.rwth-aachen.de/record/1029237/files/1029237.pdf
Einrichtungen
Thematische Einordnung (Klassifikation)
DDC: 004
Kurzfassung
Running quantum programs on real hardware requires a compilation process in which qubit operations must be mapped onto physical resources, a task commonly referred to as the mapping problem. The objective is to choose a mapping that minimizes the execution time of the compiled program. This is critical because qubits are susceptible to decoherence, which limits the time available for computation. This thesis introduces an algorithm for addressing the mapping problem on the SpinBus architecture, a shuttling-based platform in which qubits can physically move and where certain types of conflicts must be considered. Because the mapping problem is believed to be computationally hard, our approach relies on heuristic strategies that do not guarantee optimality but produce high-quality solutions within practical time limits. We also develop a method for generating an initial qubit placement. We evaluate the proposed methods on a suite of benchmark circuits and compare them to a baseline mapping strategy. Our evaluation considers several metrics that capture the runtime of the mapping algorithm, the total amount of required shuttling, the likelihood of conflicts, and the achievable parallelism.
OpenAccess: 
PDF
Dokumenttyp
Bachelor Thesis
Format
online
Sprache
English
Interne Identnummern
RWTH-2026-02163
Datensatz-ID: 1029237
Beteiligte Länder
Germany
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