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Understanding Transistor Aging Impact on the Behavior of RRAM Cells
; ; ; ;
In
2024 IFIP/IEEE 32nd International Conference on Very Large Scale Integration (VLSI-SoC) : 6-9 Oct. 2024 : conference location: Tanger, Morocco / publisher: IEEE
2024
Online
DOI: 10.1109/VLSI-SoC62099.2024.10767807
Einrichtungen
Projekte
- BMBF 03ZU1106CB - NeuroSys: Algorithm-Hardware Co-Design (Projekt C) - B (BMBF-03ZU1106CB) (BMBF-03ZU1106CB)
- BMBF 16ES1134 - Verbundprojekt: Neuro-inspirierte Technologien der künstlichen Intelligenz für die Elektronik der Zukunft - NEUROTEC - (BMBF-16ES1134) (BMBF-16ES1134)
- G:(DE-82)BMBF-16ES1133K - NEUROTEC II (BMBF-16ES1133K) (BMBF-16ES1133K)
- TAICHIP - Boosting TalTech Capacity in Reliable and Efficient AI-Chip Design (101160182) (101160182)
Dokumenttyp
Contribution to a book/Contribution to a conference proceedings
Format
online, print
Sprache
English
Anmerkung
Peer review status of article unknown
Externe Identnummern
SCOPUS: SCOPUS:2-s2.0-85213572393
Interne Identnummern
RWTH-2024-11760
Datensatz-ID: 998946
