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OpenMP on multicore architectures

; ;

In
A practical programming model for multi-core era : International workshop on OpenMP, IWOMP 2007, Beijing, China, June 3-7, 2007 ; proceedings / Barbara Chapman ... (eds.), Seiten/Artikel-Nr: 54-64

Konferenz/Event:A practical programming model for multi-core era : International workshop on OpenMP , Beijing , Peoples R China , IWOMP 2007 , 2007-06-03 - 2007-06-07

ImpressumBerlin [u.a.] : Springer

Umfang54-64

ISBN978-3-540-69302-4, 978-3-540-69303-1

ReiheLecture Notes in Computer Science ; 4935

Online
DOI: 10.1007/978-3-540-69303-1_5


Einrichtungen

  1. Rechen- und Kommunikationszentrum (022000)
  2. Lehrstuhl für Informatik 12 (Hochleistungsrechnen) (123010)
  3. Fachgruppe Informatik (120000)


Inhaltliche Beschreibung (Schlagwörter)
OpenMP (frei) ; SMP systems (frei) ; application program interfaces (frei) ; cache architecture (frei) ; cache storage (frei) ; dualcore processors (frei) ; kernel programs (frei) ; memory architecture (frei) ; microprocessor chips (frei) ; multi-threading (frei) ; multicore architectures (frei) ; operating system kernels (frei) ; quadcore processors (frei) ; shared memory machines (frei)


Dokumenttyp
Contribution to a book/Contribution to a conference proceedings

Format
online, print

Sprache
English

Anmerkung
Peer reviewed article

Externe Identnummern
SCOPUS: SCOPUS:2-s2.0-48949091446
WOS Core Collection: WOS:000257088300005

Interne Identnummern
RWTH-CONV-190608
Datensatz-ID: 119482

Beteiligte Länder
Germany

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The record appears in these collections:
Document types > Events > Contributions to a conference proceedings
Document types > Books > Contributions to a book
Faculty of Computer Science (Fac.9)
Central and Other Institutions
022000_20131231
Public records
Publications database
120000
123010

 Record created 2013-01-28, last modified 2022-11-03



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